Publications

2023

Klaiber, M. J., Palomero Bernardo, P., Stahl, R., Feldner, I., & Gerum, C. (2023). UMA Universal Modular Accelerator Interface. In Proceedings of the TVM Conference 2022/23.

2022

Bailey, Donald G., and Michael J. Klaiber. 2022. "Union-Retire for Connected Components Analysis on FPGA" Journal of Imaging 8, no. 4: 89. https://doi.org/10.3390/jimaging8040089  

2021

Bringmann, Oliver, Klaiber, M. J. et al. "Automated HW/SW co-design for edge AI: state, challenges and steps ahead." Proceedings of the 2021 International Conference on Hardware/Software Codesign and System Synthesis. 2021.
 
Braatz, Y., & Klaiber, M. J. (2021, April). End-to-end automation frameworks for mapping neural networks onto embedded devices and early performance predictions: A survey. In 2021 Smart Systems Integration (SSI) (pp. 1-4). IEEE.

Klaiber, M. J., Acosta, A. J., Feldner, I., & Rehm, F. (2021). Enabling Cross-Domain Communication: How to Bridge the Gap between AI and HW Engineers. arXiv preprint arXiv:2104.03780.
 
Braatz, Y., Klaiber, M. J., Acosta, A. J. (2021). A Simulation-Based TVM Extension for Auto-Tuning in the Early Design Phases. In Proceedings of the TVM Conference 2021. Robert Bosch GmbH.

2020

Klaiber, M. J. (2020). End-to-End Performance Assessment of AI Systems with TVM and Virtual Models. In Proceedings of the TVM Conference 2020. Bosch Corporate Research.
 
M. J. Klaiber, I. Feldner, Y. Braatz, A. Acosta, S. Vogel, Armin Runge "
End-to-End Performance Assessment of AI Systems with TVM and Virtual Models", Synopsys Virtual Prototyping Day 2021.
 
 
 M. J. Klaiber, A. Acosta, Y. Braatz, S. Vogel, I. Feldner  "End-to-End Performance Assessment of AI Systems with TVM and Virtual Models", TVM Conference 2020.

 2019

 M. J. Klaiber, S. Vogel, A. Acosta, R. Korn, L. Ecco, K. Back, A. Guntoro, I. Feldner
"An End-to-End HW/SW Co-Design Methodology to Design Efficient Deep Neural Network Systems using Virtual Models",
Proceedings of the INTelligent Embedded Systems Architectures and Applications Workshop 2019.

 

M. J. Klaiber, D. G. Bailey, S. Simon "Comparative Study and Proof of Single-Pass Connected ComponentsAlgorithms" in Journal of Mathematical Imaging and Vision, June 2019.


 2018


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"Aross the Stack Opportunities for Deep Learning Acceleration" in
Proceedings of the International Symposium on Low Power Electronics and Design, pp. 35


B. Fleischer, S. Shukla, M. Ziegler, J. Silberman, J. Oh, V. Srinivasan, J. Choi, S. Mueller, A. Agrawal, T. Babinsky, N. Cao, C.‐Y. Chen, P. Chuang, T.Fox, G. Gristede, M. Guillorn, H.  Haynie, M. Klaiber, D. Lee, S.Lo, G. Maier, M. Scheuermann, S. Venkataramani, C. Vezyrtzis, N. Wang, F. Yee, C. Zhou, P.‐F. Lu, B. Curran, L. Chang, K. Gopalakrishnan "A Scalable Multi‐TeraOPS Deep Learning Processor Core for AI Training and Inference" in 2018 Symposia on VLSI Technology and Circuit,

Blog entry discussion the Multi‐TeraOPS Deep Learning Processor Core
IEEE Spectrum Article discussing the Multi‐TeraOPS Deep Learning Processor Core 

 

2017

M. J. Klaiber "A Parallel and Resource-Efficient Single Lookup Connected Components Analysis Architecture for Reconfigurable Hardware"  Dissertation, University of Stuttgart, 2017.


2016

Michael J. Klaiber, Donald G. Bailey, Sven Simon, "A single-cycle parallel multi-slice connected components analysis hardware architecture" in Springer Journal of Real-Time Image Processing, pp 1–11.


 

2015

Michael J. Klaiber, Donald G. Bailey, Yousef O. Baroud and Sven Simon,  "A Resource-Efficient Hardware Architecture for Connected Components Analysis" in IEEE Transactions on Circuits and Systems for Video Technology.

 

2014

Ghada Dessouky, Michael J. Klaiber, Donald G. Bailey and Sven Simon,  "Adaptive Dynamic On-Chip Memory Management for FPGA-based Reconfigurable Architectures" in 24th International Conference on Field Programmable Logic and Applications (FPL), Munich, Germany, Sept. 2014.


2013


Michael J. Klaiber, Donald G. Bailey, Silvia Ahmed, Yousef Baroud, Sven Simon, "A High-Throughput FPGA Architecture for Parallel Connected Components Analysis Based on Label Reuse" in 2013 International Conference on Field-Programmable Technology (FPT), Kyoto, Japan, Dec. 2013.


Donald G. Bailey, Michael J. Klaiber, "Efficient Hardware Calculation of Running Statistics" in Image and Vision Computing New Zealand 2013, Wellington, New Zealand, Nov. 2013.


2012


Michael J. Klaiber, Lars Rockstroh, Zhe Wang, Yousef Baroud and Sven Simon
"A memory-efficient parallel single pass architecture for connected component labeling of streamed images" in 2012 International Conference on Field-Programmable Technology (FPT), pages 159-165, Seoul, Korea, Dec. 2012.